TheAD5330/AD5331/AD5340/AD5341*aresingle8-/10-/12-bitDACs.Theyoperatefroma2.5Vto5.5Vsupplyconsumingjust115μAat3Vandfeatureapower-downmodethatfurtherreducesthecurrentto80nA.Thedevicesincorporateanon-chipoutputbufferthatcandrivetheoutputtobothsupplyrails,buttheAD5330,AD5340,andAD5341allowachoiceofbufferedorunbufferedreferenceinput.
TheAD5330/AD5331/AD5340/AD5341haveaparallelinterface.CSselectsthedeviceanddataisloadedintotheinputregistersontherisingedgeofWR.
TheGAINpinallowstheoutputrangetobesetat0VtoVREFor0Vto2×VREF.
InputdatatotheDACsisdouble-buffered,allowingsimultaneousupdateofmultipleDACsinasystemusingtheLDACpin.
AnasynchronousCLRinputisalsoprovided,whichresetsthecontentsoftheinputregisterandtheDACregistertoallzeros.Thesedevicesalsoincorporateapower-onresetcircuitthatensuresthattheDACoutputpowersonto0Vandremainsthereuntilvaliddataiswrittentothedevice.
TheAD5330/AD5331/AD5340/AD5341areavailableinthinshrinksmalloutlinepackages(TSSOP).
