TheADN2819providesreceiverfunctionsofQuantization,SignalLevelDetectandClockandDataRecoveryatratesofOC-3,OC-12,GigabitEthernet,OC-48andallFECrates.AllSONETjitterrequirementsaremet,including:JitterTransfer;JitterGeneration;andJitterTolerance.Allspecificationsarequotedfor-40ºCto+85ºCambienttemperatureunlessotherwisenoted.

Theproprietarydelayandphase-lockedloopdesignoftheADN2819providesunprecedentedjitterperformanceforrobusthigh-speednetworkingdesigns.

ThedeviceisintendedforWDMsystemapplicationsandcanbeusedwitheitheranexternalreferenceclockoranon-chipcrystaloscillator.Bothnativeratesand15/14ratedigitalwrappersratesaresupportedbytheADN2819,withoutanychangeofreferenceclockrequired.ThisdevicetogetherwithaPINdiodeandaTIApreamplifiercanimplementahighlyintegrated,lowcost,lowpowerfiberopticreceiver.ThereceiverfrontendSignalDetectcircuitindicateswhentheinputsignallevelhasfallenbelowauseradjustablethreshold.