TheADF4110familyoffrequencysynthesizerscanbeusedtoimplementlocaloscillatorsintheup-conversionanddown-conversionsectionsofwirelessreceiversandtransmitters.Theyconsistoflow-noisedigitalPFD(PhaseFrequencyDetector),aprecisionchargepump,aprogrammablereferencedivider,programmableAandBcountersandadualmodulusprescaler(P/P+1).TheA(6-bit)andB(13-bit)counters,inconjunctionwiththedualmodulusprescaler(P/P+1),implementanNdivider(N=BP+A).Inaddition,the14-bitreferencecounter(RCounter),allowsselectableREFINfrequenciesatthePFDinput.AcompletePLL(Phase-LockedLoop)canbeimplementedifthesynthesizerisusedwithanexternalloopfilterandVCO(VoltageControlledOscillator).

Controlofalltheon-chipregistersisviaasimple3-wireinterface.Thedevicesoperatewithapowersupplyrangingfrom2.7Vto5.5Vandcanbepowereddownwhennotinuse.